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Instruction set architectures
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#	Item
611	The Virtual Instruction Set (VIS) Carl Eric Cod`ere October 24, 2002 Contents Add to Reading List Source URL: www.optimasc.com Language: English - Date: 2004-05-10 19:09:45 Instruction set architectures Assembly languages Addressing mode Machine code MOV Instruction set Reduced instruction set computing Endianness X86 assembly language Computer architecture Computing Computer engineering
612	asmlnk_CourierNew_12_Wordpad.rt Add to Reading List Source URL: shop-pdp.net Language: English - Date: 2014-10-25 12:48:01 Instruction set architectures Microcontrollers IBM Basic assembly language TEST DEC Alpha Instruction set Intel Addressing mode Computer architecture Assembly languages Computer engineering
613	aiT for e200 aiT WCET Analyzers statically compute tight bounds for the worst-case execution time (WCET) of tasks in real-time systems. They directly analyze binary executables and take the intrinsic cache and pipeline b Add to Reading List Source URL: www.absint.com Language: English - Date: 2015-01-19 06:15:30 Power Architecture Instruction set architectures PowerPC CodeWarrior Worst-case execution time 64-bit Ppc64 Software Computer architecture Computing
614	OpenSSL FIPS Object Module Version[removed]By the OpenSSL Software Foundation Add to Reading List Source URL: www.openssl.org Language: English - Date: 2014-11-25 17:47:14 Instruction set architectures X86 architecture Cryptographic software AES instruction set Advanced Encryption Standard OpenSSL X86-64 X86 Xeon Computer architecture Software Computing
615	PIC16F62X Data Sheet FLASH-Based 8-Bit CMOS Microcontroller  2003 Microchip Technology Inc. Add to Reading List Source URL: ww1.microchip.com Language: English - Date: 2006-05-09 12:46:39 Computer architecture Computer memory Digital electronics Instruction set architectures PIC microcontroller EEPROM Microchip Technology Non-volatile memory Harvard architecture Computer hardware Microcontrollers Electronic engineering
616	The Slow Winter James Mickens James Mickens is a researcher in the Distributed Systems group at Microsoft’s Redmond Add to Reading List Source URL: www.usenix.org Language: English - Date: 2015-04-13 04:30:41 Computer engineering Parallel computing Central processing unit ARM architecture Scalability Computing Computer architecture Instruction set architectures
617	XinuPi: Porting a Lightweight Educational Operating System to the Raspberry Pi Eric Biggers Farzeen Harunani Add to Reading List Source URL: www.mscs.mu.edu Language: English - Date: 2015-03-10 17:42:34 Interrupts USB Instruction set architectures Raspberry Pi Xinu Embedded system Universal Serial Bus COM Interrupt handler Computer hardware Computer architecture Computing
618	Probabilistic Counter Updates for Predictor Hysteresis and Stratification Nicholas Riley Craig Zilles Department of Computer Science Add to Reading List Source URL: sabi.net Language: English - Date: 2005-11-03 16:47:01 Central processing unit Instruction set architectures Branch predictor Counter Linear feedback shift register CPU cache Hardware performance counter DEC Alpha ARM architecture Computer architecture Computer hardware Computing
619	UNITED STATES OF AMERICA BEFORE THE FEDERAL TRADE COMMISSION COMMISSIONERS: In the Matter of INTEL CORPORATION, Add to Reading List Source URL: download.intel.com Language: English - Date: 2010-01-04 11:11:50 Fabless semiconductor companies IBM PC compatibles Intel Advanced Micro Devices Integrated circuits Instruction set architectures Nvidia Microprocessor Centrino Computer hardware Electronic engineering Electronics
620	CAMUS, the MANMAN / MK User Group FLASH Brought to you by: See more on page 4... Add to Reading List Source URL: www.camus.org Language: English - Date: 2011-05-17 20:51:10 Instruction set architectures Minicomputers Virtual machines Charon Information technology OpenVMS VirtualBox HP 300 HP Computing Software System software

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